Publicidad
PC BOARD INTERFACE - INTERFACE PC BOARD - SCHALTBILD PC BOARD - SCHEMA DELLA PC BOARD INTERFAZ PC BOARD
( PC BOARD 4/7, 20"BI)
V33
V33
V33
Q5
Q6
BSN 20
BSN 20
[P. 1]
2
3
3
SC L
Q7
BSN 20
[P. 1]
2
3
3
SD A
[P. 2]
[P. 2]
[P. 2]
31
GCL K
GCLK
TP 61
34
GPEN
GCOAST
[P. 2]
32
GVS
GVS
[P. 2]
33
GHSS OG
GHSSOG
[P. 2]
35
GFBK
GFBK
[P. 2]
GB E[0..7 ]
GBE0
2
GBE0
GBE1
3
GBE1
GBE2
4
GBE2
GBE3
5
GBE3
GBE4
6
GBE4
GBE5
7
GBE5
GBE6
8
GBE6
GBE7
9
GBE7
[P. 2]
GGE [0..7]
GGE0
10
GGE0
GGE1
11
GGE1
GGE2
12
GGE2
GGE3
13
GGE3
GGE4
14
GGE4
GGE5
15
GGE5
GGE6
18
GGE6
GGE7
19
GGE7
[P. 2]
GRE[0. .7]
GRE0
20
GRE0
GRE1
21
GRE1
GRE2
22
GRE2
GRE3
23
GRE3
GRE4
24
GRE4
GRE5
25
GRE5
GRE6
26
GRE6
GRE7
PW113
U12A
27
GRE7
Graphics and
[P. 1]
Video Port
71
VCLK
VCLK
[P. 1]
74
VVS
VVS
[P. 1]
75
VHS
VHS
[P. 1]
69
VFI EL D
VFIELD
[P. 1]
70
VPEN
VPEN
GV0
47
VYUV0
GV1
48
VYUV1
GV2
49
VYUV2
GV3
50
VYUV3
GV4
51
VYUV4
GV5
54
VYUV5
GV6
55
VYUV6
old net:
Y
GV7
56
VYUV7
[P. 1]
GV[0 ..7]
VCC
VCC
VCPU33
Q9
Q10
BSN 20
BSN 20
SCL _CPU
2
3
3
2
SCL_5V
[P. 1]
Q11
Q12
BSN 20
BSN 20
2
3
3
2
SDA_ CP U
SD A_5V
[P. 1]
LCD03B
First issue 10 / 03
VCPU33
VCPU33
C5 4
0.1U K
U1 1
8
1
VCC
A0
7
2
WP
A1
SCL _CPU
2
6
3
SCL
A2
5
4
SDA
GND
Q8
BSN 20
AT 24C32AN-10SI-2.7
SDA_ CP U
2
VCPU33
VCPU33
VCPU33
VCPU33
SCL _CPU
SDA _CPU
[P. 1]
[P. 1]
36
GCOAS T
[P. 2]
TP 12
TP 13
[P. 3]
IRRCVR_3V
[P. 1]
TV_DET
[P. 7]
L CD_ON
[P. 7]
L CD_BR
Trace an
d Components Close IC
VCPU18
L11
L12
C6 0
C6 1
0.1U K
0.1U K
VCPU33
Power and Ground
U 12D PW113
C6 2
C6 3
0.1U K
0.1U K
R ES ETn
[P. 3]
VCPU33
R5 9
3.3K
R6 0
0
RP TR 11
142
TESTEN
R ES ETn
139
RESET
R6 3
10 0
EXTRSTEN
28
EXTRSTEN
A10
R6 4
47 0
RX D
67
RX
RXD
A11
TX D
68
TX D
TXD
A12
R6 5
10K
A13
A14
SDA_ CP U
207
PORTA0
A15
SCL _CPU
206
PORTA1
A16
SDA2
U 12C
205
PORTA2
A17
SC L2
204
PORTA3
A18
PW11 3
IRRCVR_3V
203
PORTA4
A19
Mi sc
R129
0
IN T
202
PORTA5
R130
OPEN
GP IOA6
201
PORTA6
R6 6
10K
PW M_ BR
200
PORTA7
C5 7
2.2U K
147
TRST
16V
146
TCK
145
TMS
144
TDI
143
TDO
D10
[P. 3]
193
NM I
NMI
D11
D12
D13
169
XI
D14
170
XO
D15
R6 7
1.5M
WR
Y1
ROMOE
X607
X608
ROMWE
CS0
C5 8
14.318M HZ
C5 9
CS1
18P
18P
50 V J
50 V J
PW113
old
net: UV
U12E
[P. 1]
BU [0..7]
BU 0
39
PORTC0
BU 1
40
PORTC1
BU 2
41
PORTC2
BU 3
42
PORTC3
BU 4
43
PORTC4
BU 5
44
PORTC5
BU 6
45
PORTC6
BU 7
46
PORTC7
[P. 1]
RY[0..7 ]
R Y 0
57
PORTB0
R Y 1
58
PORTB1
R Y 2
59
PORTB2
R Y 3
60
PORTB3
R Y 4
61
PORTB4
R Y 5
62
PORTB5
R Y 6
63
PORTB6
R Y 7
64
PORTB7
PW113
VCPU33
C6 4
C6 5
C6 6
C6 7
C6 8
C6 9
C7 0
C7 1
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
106
DCLK
107
DCLKNEG
108
DVS
109
A[1 ..19]
DHS
A1
192
110
A1
DEN
A2
[P. 3]
191
A2
A3
190
103
A3
DR0
A4
189
102
A4
DR1
A5
188
101
A5
DR2
A6
187
100
A6
DR3
A7
184
99
A7
DR4
A8
183
98
A8
DR5
A9
182
97
A9
DR6
A10
181
96
DR7
A11
180
A12
179
95
DG0
A13
178
94
DG1
A14
177
93
DG2
A15
176
92
DG3
A16
175
91
DG4
A17
174
90
DG5
A18
U12B
173
89
DG6
A19
164
88
DG7
PW113
D[0..15]
D0
163
83
D0
DB0
[P. 3]
Display Port
D1
162
82
D1
DB1
D2
161
81
D2
DB2
D3
160
80
D3
DB3
D4
159
79
D4
DB4
D5
158
78
D5
DB5
D6
157
77
D6
DB6
D7
156
76
D7
DB7
155
D8
D8
D9
154
136
D9
DGR0
D1 0
153
135
DGR1
D1 1
152
134
DGR2
D1 2
151
133
DGR3
D1 3
150
132
DGR4
D1 4
149
131
DGR5
148
D1 5
130
DGR6
129
DGR7
RDn
TP 62
195
RD
W R n
TP 63
194
128
DGG0
196
[P .3 ]
127
ROM OE n
DGG1
197
[P .3 ]
126
ROM WE n
DGG2
CS 0n
198
[P .3 ]
125
CS0 n
DGG3
CS 1n
199
122
[P .3 ]
CS1 n
DGG4
121
DGG5
120
DGG6
119
DGG7
118
DGB0
117
DGB1
116
DGB2
115
DGB3
114
DGB4
113
DGB5
112
DGB6
111
DGB7
L2
42 OHM
L5
42 OHM
L7
NC _L1206
C8 0
470P K
EMI solution
VCPU18
C7 2
C7 3
C7 4
C7 5
C7 6
0.1U K
0.1U K
0.1U K
0.1U K
0.1U K
C5 5
C5 6
22 P J
22 P J
L1 0
[P .5 ]
DC LK
DC LK
30 OHM
RVS
[P .5 ]
RV S
RHS
[P .5 ]
RHS
[P .5 ]
RDE
RDE
DR[0. .7]
DR0
DR1
[P .5 ]
DR2
DR3
DR4
DR5
DR6
DR7
DG [0..7]
DG0
DG1
[P .5 ]
DG2
DG3
DG4
DG5
DG6
DG7
DB [0..7]
DB 0
[P .5 ]
DB 1
DB 2
DB 3
DB 4
DB 5
DB 6
DB 7
DG R[0 ..7]
DG R0
DG R1
[P .5 ]
DG R2
DG R3
DG R4
DG R5
DG R6
DG R7
DGG[0. .7]
DGG0
[P .5 ]
DGG1
DGG2
DGG3
DGG4
DGG5
DGG6
DGG7
DGB[0. .7]
DGB0
DGB1
[P .5 ]
DGB2
DGB3
DGB4
DGB5
DGB6
DGB7
PC BOA RD
20L0BI
48.M 2305 .A00
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