8-2 U1(S5L3200) Block Diagram
Samsung Electronics
DDR SDRAM #0
DDR SDRAM #1
Dual Channel
DDR Controller
& AHB+ BUS
ARM9TDMI
Video Pre-processor
4KB
4KB
I-Cache
D-Cache
MPEG2 Encoder
AHB+ Wrapper
MPEG2 Decoder
DV Decoder
CalmADM #0
PIP Scaler
4KB
12KB
I-Cache
D-Cache
Graphic Accelerator
Video Processor
CalmADM #1
4KB
12KB
I-Cache
D-Cache
PLL, Clock/Reset
APB Bridge
Generation Block
27MHz X-tal
I2S
SPDIF(IN)
SPDIF(OUT)
SPI
UART
WDT
IR
Host I/F
TIMER
I2C
GPIO
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SDIN
IEEE1394
USB 1.1 Host
Dual ATAPI (w/ AES)
PSD
PSM
MIXER
SDOUT
Video PENTA DAC
SPD
IODMA
BT656(IN)
IEEE1394
USB
ATAPI
BT656(OUT)
Analog Video Out
Block Diagram
8-3