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2.4 Advanced Chipset Features
► Memory Timing Setting
SLI Broadcast Aperture
LDT Frequency
F5: Previous Values
Memory Timing Setting
Click <Enter> key to enter its submenu:
Parameters
Memory Timing Setting
x tCL (CAS Latency)
x tRCD
x tRP
x tRAS
x Command Per Clock (CMD)
** Advance Memory Settings **
x tRRD
x tRC
x tWR
x tWTR
x tREF
F5: Previous Values
Memory Timing Setting
You may manually set the DRAM timing parameters through the following sub-items, or leave
them at their default settings according to the SPD (Serial Presence Detect) data stored in the
DRAM.
-
tCL (CAS Latency)
-
tRCD
-
tRP
-
tRAS
-
Command Per Clock (CMD)
2-10
Get user manuals:
See SafeManuals.com
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F6: Fail-Safe Defaults
Phoenix – AwardBIOS CMOS Setup Utility
:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F6: Fail-Safe Defaults
Press Enter
Disabled
5x
Memory Timing Setting
Setting
Current Value
Auto
Auto(5)
Auto(5)
Auto(5)
Auto(18)
Auto(2T)
Auto(3)
Auto(22)
Auto(5)
Auto(9)
Auto
7.8uS
Item Help
F7: Optimized Defaults
Item Help
5
5
5
18
2T
3
22
5
9
F7: Optimized Defaults
FP-IN9 SLI
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