Ud Board Schematic Diagram - Sony KP-51WS510 Manual De Servicio

UD BOARD SCHEMATIC DIAGRAM

1 | 2 | 3 |
A
—
B
—
C
—
D
—
E
—
F
FB7001
—
C7068 C7069
0.01 0.01
:CHIP :CHIP
G
C7002
— 15pF
:CHIP
X7001
14.31818MHz
H
R7071
33
:CHIP
C7007
15pF
—
:CHIP C7067
0.01
:CHIP
C7066
0.01
:CHIP
Due to the complexity of this board, performing component level fi eld repairs is not
recommended. If service is required, complete board replacement is the preferred repair method.
Data is provided for reference only.
4 | 5 | 6 |
2.5V
3.3V
C7010
0.01
:CHIP
+3.3V
GNDA
GNDA
+3.3V
ADC_TEST
AVDADC_33
GNDA
BLUG_IN
BLU_IN
AVDADC_33
GNDA
GRNG_N
GRN_N
AVDADC_33
GNDA
REDG_N
RED_N
AVDADC_33
VDD_33
GND
HS_IN
VS_IN
CVDD_25
TCLK
XTAL OUT
AVDD_RPLL_33
AVSS_RPLL
AVDD_DPLL_33
C7065
0.01
AVSS_DPLL
:CHIP
7 | 8 | 9 |
CN7001
24P
DVI MOLEX CONN
SD-74320-004
3.3V C7078 3.3V D7006
UDZSTE-175.6B
IC7007
IC7008
IC7009
PACDN006 PACDN006
PACDN006
PROTECT
PROTECT
PROTECT
C7079
D7003
UDZSTE-175.6B
UDZSTE-175.6B
C7016 C7023
0.01 100pF
:CHIP :CH-CHIP
C7015
0.01
C7022
:CHIP
1000p
:CH-CHIP
C7014
0.01
:CHIP
C7013 C7021
0.01
:CHIP 16V
R7029
1k
:RN-CP
DVI_SDA
DVI_SCL
IRQ
RESETN
SDA
SCL
VS_OUT
HS_OUT
BLANK
GND
VDD_33
CVSS
CVDD_25
GNDA
GNDA
VREF
COMP
RSET
IC7004
GM7030
DVI-DECODER AVDDAC_33
IOBB
IOB/PR
AVDCAC_33
IOGB
IOG/PB
AVDDAC_33
IORB
IOR/Y
10 | 11 | 12 |
D7004
UDZSTE-175.6B
5V
R7021
4 3
10k
3.3V
IC7001
BR24C02F-WE2
C7018
+5V 47p
5 6
:CHIP
C7080 C7019
47p
:CHIP
C7020
47p
:CHIP
R7108 47
R7109 47
D7002
+2.5V
TP7002
TP7004
TP7003
TP7001
C7028
25V :CHIP
R7066
1.2k
:CHIP
R7036 3.3k :CHIP
C7032 C7030
13 | 14 |
D7001
DAN202K
2 1
5V
R7126
0
C7001
C7017 16V
25V
7 8
:CHIP
5V
R7026
10k
R7025 10k
R7106 10k
+5V
5V
FL7001
NFM2012P13C224RT
EMI
C7024 C7025
16V 25V
:CHIP