Diagramas De Lógica - ABB Relion 670 Serie Manual De Referencia

Sección 12
Control
12.4.8.3
608
Diagramas de lógica
QA1_OP
QA1_CL =1
QB61_OP
QB61_CL =1
QB62_OP
QB62_CL =1
QC1_OP
QC1_CL =1
QC2_OP
QC2_CL =1
1QC3_OP
1QC3_CL =1
2QC3_OP
2QC3_CL =1
VPQB61
VPQB62 &
1
VPQA1
VPQC1
>1
&
VPQC2
1
VP1QC3
QA1_OP
QC1_OP
QC2_OP
1QC3_OP
QB61_EX1
VPQC1
VP1QC3
&
QC1_CL
1QC3_CL
QB61_EX2
VPQA1
VPQC1
>1
&
VPQC2
1
VP2QC3
QA1_OP
QC1_OP
QC2_OP
2QC3_OP
QB62_EX1
VPQC2
VP2QC3
&
QC2_CL
2QC3_CL
QB62_EX2
VPQB61
VPQB62
& 1
QB61_OP
QB62_OP
1
IEC04000560 V1 ES
BH_CONN
VPQA1
VPQB61
VPQB62
VPQC1
VPQC2
VP1QC3
VP2QC3
QA1CLREL
QA1CLITL
QB61REL
QB61ITL
QB62REL
QB62ITL
QC1REL
QC1ITL
QC2REL
QC2ITL
en04000560.vsd
1MRK 505 183-UES C
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