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Siemens 6ES7136-6BA00-0CA0 Informacion De Producto página 27

Módulos failsafe

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Tsx sum term:
(T2x + T3x) < T
→ Tsx = T
cycle
(T2x + T3x) >= T
→ Tsx = MAX(T2x, T
cycle
For deactivated sensor supplies or sensor supplies with deactivated short-circuit test, enter the value of 0 in the formula for
Tsx.
T1 = Input delay for the considered channel
T2 = Short-circuit test time for the considered channel
x = activated sensor supply
T2x = Time for the short-circuit test
T3x = Startup time of sensors after the short-circuit test
n = Number of sensor supplies with activated short-circuit test
Examples
The following section contains an example for the calculation of the maximum response time with external short-circuits at
an F-DI 8x24VDC HF with a maximum cycle time T
Chan
T1
Short-circuit
nel
[ms]
test
0
3.2
Enable
1
3.2
Enable
2
3.2
Enable
3
3.2
Enable
4
3.2
Enable
5
3.2
Enable
6
3.2
Enable
7
3.2
Enable
Sample calculation: Sum term Ts = (4.2 ms + 4.2 ms) < 11.5 ms → Tsx = T
The following section shows an example for the calculation of the maximum response time with external short-circuits at an
F-DI 8x24VDC HF with a maximum cycle time T
Chan
T1
Short-circuit
nel
[ms]
test
0
0.4
Enable
1
0.8
Enable
2
1.6
Enable
3
3.2
Enable
4
0.4
Disable
5
0.8
Enable
6
1.6
Enable
7
3.2
Enable
*) With short-circuit test deactivated, external short-circuits are not detected.
Sample calculation: Sum term Ts = (4.2 ms +10 ms) >= 11.5 ms → Tsx = MAX(4.2 ms, 11.5 ms) + 10 ms
Product Information for the Documentation of ET 200SP Fail-safe Modules
A5E32586870-AK, 02/2024
cycle
) + T3x
cycle
cycle
T2
T3
T
cycle
[ms]
[ms]
[ms]
4.2
4.2
11.5
4.2
4.2
11.5
4.2
4.2
11.5
4.2
4.2
11.5
4.2
4.2
11.5
4.2
4.2
11.5
4.2
4.2
11.5
4.2
4.2
11.5
of 11.5 ms depending on the parameter assignment.
cycle
T2
T3
T
cycle
[ms]
[ms]
[ms]
0.5
0.5
11.5
4.2
10
11.5
20
4.2
11.5
100
100
11.5
-
-
11.5
100
4.2
11.5
500
500
11.5
200
2000
11.5
0
of 11.5 ms with the default parameter assignment.
T2 + T3 <
Ts [ms]
T
cycle
YES
11.5
YES
11.5
YES
11.5
YES
11.5
YES
11.5
YES
11.5
YES
11.5
YES
11.5
cycle
T2 + T3 <
Ts [ms]
T
cycle
YES
11.5
NO
21.5
NO
24.2
NO
200
-
0
NO
104.2
NO
1000
NO
4000
MAX(T
, T2)
Max. response time
cycle
[ms]
with external short-
circuits [ms]
11.5
210.2
11.5
210.2
11.5
210.2
11.5
210.2
11.5
210.2
11.5
210.2
11.5
210.2
11.5
210.2
MAX(T
, T2)
Max. response time
cycle
[ms]
with external short-
circuits [ms]
11.5
5465.3
11.5
5465.7
20
5475.0
100
5556.6
11.5
- *)
100
5554.2
500
5955.0
2000
7456.6
27

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